#include <mos6510.h>

Inheritance diagram for MOS6510:

Classes
struct	ProcessorCycle

Public Member Functions
virtual uint8_t	cpuRead (uint_least16_t addr)=0

virtual void	cpuWrite (uint_least16_t addr, uint8_t data)=0

virtual void	reset ()

const char *	credits () const

void	debug (bool enable, FILE *out)

void	setRDY (bool newRDY)

void	triggerRST ()

void	triggerNMI ()

void	triggerIRQ ()

void	clearIRQ ()

Static Public Attributes
static const int	SR_INTERRUPT = 2

Protected Member Functions
	MOS6510 (EventContext *context)

void	eventWithoutSteals ()

void	eventWithSteals ()

void	Initialise ()

void	setFlagsNZ (uint8_t value)

uint8_t	getStatusRegister ()

void	setStatusRegister (uint8_t sr)

void	IRQLoRequest ()

void	IRQHiRequest ()

void	interruptsAndNextOpcode ()

void	calculateInterruptTriggerCycle ()

void	fetchNextOpcode ()

void	throwAwayFetch ()

void	throwAwayRead ()

void	FetchDataByte ()

void	FetchLowAddr ()

void	FetchLowAddrX ()

void	FetchLowAddrY ()

void	FetchHighAddr ()

void	FetchHighAddrX ()

void	FetchHighAddrX2 ()

void	FetchHighAddrY ()

void	FetchHighAddrY2 ()

void	FetchLowEffAddr ()

void	FetchHighEffAddr ()

void	FetchHighEffAddrY ()

void	FetchHighEffAddrY2 ()

void	FetchLowPointer ()

void	FetchLowPointerX ()

void	FetchHighPointer ()

void	FetchEffAddrDataByte ()

void	PutEffAddrDataByte ()

void	PushLowPC ()

void	PushHighPC ()

void	PushSR ()

void	PopLowPC ()

void	PopHighPC ()

void	PopSR ()

void	brkPushLowPC ()

void	WasteCycle ()

void	adc_instr ()

void	alr_instr ()

void	anc_instr ()

void	and_instr ()

void	ane_instr ()

void	arr_instr ()

void	asl_instr ()

void	asla_instr ()

void	aso_instr ()

void	axa_instr ()

void	axs_instr ()

void	bcc_instr ()

void	bcs_instr ()

void	beq_instr ()

void	bit_instr ()

void	bmi_instr ()

void	bne_instr ()

void	branch_instr (bool condition)

void	bpl_instr ()

void	brk_instr ()

void	bvc_instr ()

void	bvs_instr ()

void	clc_instr ()

void	cld_instr ()

void	cli_instr ()

void	clv_instr ()

void	cmp_instr ()

void	cpx_instr ()

void	cpy_instr ()

void	dcm_instr ()

void	dec_instr ()

void	dex_instr ()

void	dey_instr ()

void	eor_instr ()

void	inc_instr ()

void	ins_instr ()

void	inx_instr ()

void	iny_instr ()

void	jmp_instr ()

void	las_instr ()

void	lax_instr ()

void	lda_instr ()

void	ldx_instr ()

void	ldy_instr ()

void	lse_instr ()

void	lsr_instr ()

void	lsra_instr ()

void	oal_instr ()

void	ora_instr ()

void	pha_instr ()

void	pla_instr ()

void	plp_instr ()

void	rla_instr ()

void	rol_instr ()

void	rola_instr ()

void	ror_instr ()

void	rora_instr ()

void	rra_instr ()

void	rti_instr ()

void	rts_instr ()

void	sbx_instr ()

void	say_instr ()

void	sbc_instr ()

void	sec_instr ()

void	sed_instr ()

void	sei_instr ()

void	shs_instr ()

void	sta_instr ()

void	stx_instr ()

void	sty_instr ()

void	tax_instr ()

void	tay_instr ()

void	tsx_instr ()

void	txa_instr ()

void	txs_instr ()

void	tya_instr ()

void	xas_instr ()

void	illegal_instr ()

void	doADC ()

void	doSBC ()

void	doJSR ()

Protected Attributes
EventContext &	eventContext

int	cycleCount

int	interruptCycle

bool	irqAssertedOnPin

bool	nmiFlag

bool	rstFlag

bool	rdy

bool	flagN

bool	flagC

bool	flagD

bool	flagZ

bool	flagV

bool	flagI

bool	flagB

uint_least16_t	Register_ProgramCounter

uint_least16_t	Cycle_EffectiveAddress

uint_least16_t	Cycle_HighByteWrongEffectiveAddress

uint_least16_t	Cycle_Pointer

uint8_t	Cycle_Data

uint8_t	Register_StackPointer

uint8_t	Register_Accumulator

uint8_t	Register_X

uint8_t	Register_Y

struct ProcessorCycle	instrTable [0x101<< 3]

EventCallback< MOS6510 >	m_nosteal

EventCallback< MOS6510 >	m_steal

Friends
class	MOS6510Debug

Detailed Description

Cycle-exact 6502/6510 emulation core.

Code is based on work by Simon A. White sidpl.nosp@m.ay2@.nosp@m.yahoo.nosp@m..com. Original Java port by Ken Händel. Later on, it has been hacked to improve compatibility with Lorenz suite on VICE's test suite.

Author: alankila

Constructor & Destructor Documentation

MOS6510::MOS6510 ( EventContext * context )

protected

Create new CPU emu

Parameters

context The Event Context

Member Function Documentation

void MOS6510::alr_instr ( )

inlineprotected

Undocumented - This opcode ANDs the contents of the A register with an immediate value and then LSRs the result.

void MOS6510::anc_instr ( )

inlineprotected

Undocumented - ANC ANDs the contents of the A register with an immediate value and then moves bit 7 of A into the Carry flag. This opcode works basically identically to AND #immed. except that the Carry flag is set to the same state that the Negative flag is set to.

void MOS6510::arr_instr ( )

inlineprotected

Undocumented - This opcode ANDs the contents of the A register with an immediate value and then RORs the result (Implementation based on that of Frodo C64 Emulator)

void MOS6510::aso_instr ( )

inlineprotected

Undocumented - This opcode ASLs the contents of a memory location and then ORs the result with the accumulator.

void MOS6510::axa_instr ( )

inlineprotected

Undocumented - This opcode stores the result of A AND X AND the high byte of the target address of the operand +1 in memory.

void MOS6510::axs_instr ( )

inlineprotected

Undocumented - AXS ANDs the contents of the A and X registers (without changing the contents of either register) and stores the result in memory. AXS does not affect any flags in the processor status register.

void MOS6510::calculateInterruptTriggerCycle ( )

inlineprotected

Evaluate when to execute an interrupt. Calling this method can also result in the decision that no interrupt at all needs to be scheduled.

void MOS6510::clearIRQ ( )

Inform CPU that IRQ is no longer pulled low.

virtual uint8_t MOS6510::cpuRead ( uint_least16_t addr )

pure virtual

Get data from system environment

Parameters

address

Returns: data byte CPU requested

Implemented in c64cpu.

virtual void MOS6510::cpuWrite	(	uint_least16_t	addr,
		uint8_t	data
	)

pure virtual

Write data to system environment

Parameters

address
data

Implemented in c64cpu.

void MOS6510::dcm_instr ( )

inlineprotected

Undocumented - This opcode DECs the contents of a memory location and then CMPs the result with the A register.

void MOS6510::doADC ( )

inlineprotected

BCD adding

void MOS6510::doSBC ( )

inlineprotected

BCD subtracting

void MOS6510::eventWithoutSteals ( )

protected

When AEC signal is high, no stealing is possible

void MOS6510::eventWithSteals ( )

protected

When AEC signal is low, steals permitted

void MOS6510::FetchDataByte ( )

inlineprotected

Fetch value, increment PC

Addressing Modes:

Immediate
Relative

void MOS6510::FetchHighAddr ( )

inlineprotected

Fetch high address byte, increment PC (Absolute Addressing)

Low byte must have been obtained first!

Addressing Modes:

Absolute

void MOS6510::FetchHighAddrX ( )

inlineprotected

Fetch high byte of address, add index register X to low address byte,

increment PC

Addressing Modes:

Absolute Indexed

void MOS6510::FetchHighAddrX2 ( )

inlineprotected

Same as FetchHighAddrX except dosen't worry about page crossing.

void MOS6510::FetchHighAddrY ( )

inlineprotected

Fetch high byte of address, add index register Y to low address byte,

increment PC

Addressing Modes:

Absolute Indexed

void MOS6510::FetchHighAddrY2 ( )

inlineprotected

Same as FetchHighAddrY except dosen't worry about page crossing.

void MOS6510::FetchHighEffAddr ( )

inlineprotected

Fetch effective address high

Addressing Modes:

Indirect
Indexed Indirect (pre X)

void MOS6510::FetchHighEffAddrY ( )

inlineprotected

Fetch effective address high, add Y to low byte of effective address

Addressing Modes:

Indirect indexed (post Y)

void MOS6510::FetchHighEffAddrY2 ( )

inlineprotected

Same as FetchHighEffAddrY except dosen't worry about page crossing.

void MOS6510::FetchHighPointer ( )

inlineprotected

Fetch pointer address high, increment PC

Addressing Modes:

Absolute Indirect

void MOS6510::FetchLowAddr ( )

inlineprotected

Fetch low address byte, increment PC

Addressing Modes:

Stack Manipulation
Absolute
Zero Page
Zero Page Indexed
Absolute Indexed
Absolute Indirect

void MOS6510::FetchLowAddrX ( )

inlineprotected

Read from address, add index register X to it

Addressing Modes:

Zero Page Indexed

void MOS6510::FetchLowAddrY ( )

inlineprotected

Read from address, add index register Y to it

Addressing Modes:

Zero Page Indexed

void MOS6510::FetchLowEffAddr ( )

inlineprotected

Fetch effective address low

Addressing Modes:

Indirect
Indexed Indirect (pre X)
Indirect indexed (post Y)

void MOS6510::FetchLowPointer ( )

inlineprotected

Fetch pointer address low, increment PC

Addressing Modes:

Absolute Indirect
Indirect indexed (post Y)

void MOS6510::FetchLowPointerX ( )

inlineprotected

Add X to it

Addressing Modes:

Indexed Indirect (pre X)

void MOS6510::Initialise ( )

protected

Initialise CPU Emulation (Registers)

void MOS6510::ins_instr ( )

inlineprotected

Undocumented - This opcode INCs the contents of a memory location and then SBCs the result from the A register.

void MOS6510::las_instr ( )

inlineprotected

Undocumented - This opcode ANDs the contents of a memory location with the contents of the stack pointer register and stores the result in the accumulator, the X register, and the stack pointer. Affected flags: N Z.

void MOS6510::lax_instr ( )

inlineprotected

Undocumented - This opcode loads both the accumulator and the X register with the contents of a memory location.

void MOS6510::lse_instr ( )

inlineprotected

Undocumented - LSE LSRs the contents of a memory location and then EORs the result with the accumulator.

void MOS6510::oal_instr ( )

inlineprotected

Undocumented - This opcode ORs the A register with #xx, ANDs the result with an immediate value, and then stores the result in both A and X. xx may be EE,EF,FE, OR FF, but most emulators seem to use EE

void MOS6510::PopHighPC ( )

inlineprotected

Increment stack and pull program counter high byte from stack.

void MOS6510::PopLowPC ( )

inlineprotected

Increment stack and pull program counter low byte from stack.

void MOS6510::PopSR ( )

inlineprotected

increment S, Pop P off stack

void MOS6510::PushHighPC ( )

inlineprotected

Push Program Counter High Byte on stack, decrement S

void MOS6510::PushLowPC ( )

inlineprotected

Push Program Counter Low Byte on stack, decrement S

void MOS6510::PushSR ( )

inlineprotected

Push P on stack, decrement S

void MOS6510::PutEffAddrDataByte ( )

inlineprotected

Write Cycle_Data to effective address.

void MOS6510::reset ( )

virtual

Reset CPU Emulation

void MOS6510::rla_instr ( )

inlineprotected

Undocumented - RLA ROLs the contents of a memory location and then ANDs the result with the accumulator.

void MOS6510::rra_instr ( )

inlineprotected

Undocumented - RRA RORs the contents of a memory location and then ADCs the result with the accumulator.

void MOS6510::say_instr ( )

inlineprotected

Undocumented - This opcode ANDs the contents of the Y register with <ab+1> and stores the result in memory.

void MOS6510::setFlagsNZ ( uint8_t value )

inlineprotected

Set N and Z flag values.

Parameters

value to set flags from

void MOS6510::setRDY ( bool newRDY )

Handle bus access signals. When RDY line is asserted, the CPU will pause when executing the next read operation.

Parameters

rdy	new state for RDY signal

void MOS6510::throwAwayFetch ( )

inlineprotected

Read the next opcode byte from memory (and throw it away)

void MOS6510::throwAwayRead ( )

inlineprotected

Issue throw-away read. Some people use these to ACK CIA IRQs.

void MOS6510::triggerIRQ ( )

Pull IRQ line low on CPU.

void MOS6510::triggerNMI ( )

Trigger NMI interrupt on the CPU. Calling this method flags that CPU must enter the NMI routine at earliest opportunity. There is no way to cancel NMI request once given.

void MOS6510::triggerRST ( )

This forces the CPU to abort whatever it is doing and immediately enter the RST interrupt handling sequence. The implementation is not compatible: instructions actually get aborted mid-execution. However, there is no possible way to trigger this signal from programs, so it's OK.

void MOS6510::xas_instr ( )

inlineprotected

Undocumented - This opcode ANDs the contents of the X register with <ab+1> and stores the result in memory.

Member Data Documentation

int MOS6510::cycleCount

protected

Current instruction and subcycle within instruction

EventContext& MOS6510::eventContext

protected

Our event context copy.

struct ProcessorCycle MOS6510::instrTable[0x101<< 3]

protected

Table of CPU opcode implementations

int MOS6510::interruptCycle

protected

When IRQ was triggered. -MAX means "during some previous instruction", MAX means "no IRQ"

bool MOS6510::irqAssertedOnPin

protected

IRQ asserted on CPU

EventCallback<MOS6510> MOS6510::m_nosteal

protected

Represents an instruction subcycle that writes

EventCallback<MOS6510> MOS6510::m_steal

protected

Represents an instruction subcycle that reads

bool MOS6510::nmiFlag

protected

NMI requested?

bool MOS6510::rdy

protected

RDY pin state (stop CPU on read)

bool MOS6510::rstFlag

protected

RST requested?

const int MOS6510::SR_INTERRUPT = 2

static

Status register interrupt bit.

The documentation for this class was generated from the following files:

mos6510.h
mos6510.cpp

Classes

Public Member Functions

Static Public Attributes

Protected Member Functions

Protected Attributes

Friends

Detailed Description

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation